GE IC693CPU360 | Modular CPU 240K Base – Series 90-30 – Field Service Notes

Description

Hard-Numbers: Technical Specifications

• Processor: Intel 80486DX4, 25 MHz clock
• User Program Memory: 80 KB
• Register Memory: 240 KB (%R addressing)
• Floating Point: Supported (32-bit hardware)
• Discrete I/O: 2048 points max combined (%I + %Q)
• Analog Input (%AI): 128 words (up to 8K words with option modules)
• Analog Output (%AQ): 64 words (up to 8K words with option modules)
• Internal Coils (%M): 1024 bits
• Discrete Global Memory (%G): 1280 bits
• Timers/Counters: 340 combined
• Scan Rate: 0.22 ms per 1K Boolean logic (typical)
• Serial Ports: 2 (Port 1: SNP/X master/slave, Port 2: SNP/X master/slave)
• Baud Rate: Up to 115.2 Kbaud
• Expansion: Yes (up to 7 baseplates including remote)
• Battery-Backed Clock: Yes (on-board CR2032)
• Power Draw: 1.6 A @ +5 VDC
• Operating Temp: 0°C to 60°C (32°F to 140°F)
• Storage Temp: -40°C to 85°C (-40°F to 185°F)
• Module Type: Modular (plugs into CPU slot)
• Interrupts: Supported (up to 32)
• Subroutines: Supported (up to 64)
• Analog Scaling: Supported (hardware scaling)
• Triple Modular Redundancy (TMR): No (requires CPU364 for TMR)
  

  GE IC693CPU360

The Real-World Problem It Solves

• Petrochemical processing: Multi-stage distillation columns with coordinated control loops, extensive analog I/O, and complex interlocks
• Power generation: Turbine control systems, boiler management, and auxiliary plant coordination requiring high-speed processing and large I/O counts
• Pulp & paper mills: Headbox control, dryer section coordination, and reel handling with multiple expansion racks and complex sequencing

Hardware Architecture & Under-the-Hood Logic

1. Power-up sequence initializes the 80486DX4 core, runs comprehensive memory diagnostics, loads configuration from NVRAM. The CPU tests both serial ports, checks battery-backed clock integrity, and establishes backplane communication with all connected racks. Battery voltage is checked on startup—low battery flags %S0012. Expansion rack detection occurs automatically.
2. Backplane communication scans through Rack 0 (CPU baseplate) through all connected expansion/remote racks (up to Rack 7). Each rack’s I/O modules update their respective image tables. Expansion cables (IC693CBLxxx) carry data between racks. The CPU uses rack numbers to address I/O points across the entire system automatically—no manual dipswitch configuration required.
3. Program scan executes at 0.22 ms per 1K Boolean logic—fastest of all Series 90-30 CPUs. The 80K program memory accommodates extensive ladder logic with multiple program blocks. Subroutines (up to 64) enable modular programming—call reusable code blocks from anywhere in your logic, reducing redundancy and improving maintainability. Multiple program files (up to 8) can be loaded for application organization.
4. Interrupt system supports up to 32 configurable interrupt sources. When an interrupt triggers, the CPU suspends the current scan, jumps to the associated Interrupt Service Routine (ISR) subroutine, executes it, and returns to the scan. The 80486DX4 handles context switches faster than 80386 CPUs—critical for high-speed sensor response, emergency 终止 processing, or coordinating with motion controllers.
5. Floating-point unit (FPU) on the 80486DX4 handles 32-bit IEEE 754 operations in hardware at full CPU speed. Analog scaling block uses hardware to convert raw input values to engineering units directly. PID loops operate in true floating-point—temperature in °F, pressure in PSI, flow in GPM—keep engineering units native throughout your logic. No integer scaling hacks required.
6. Serial ports operate independently and can be configured as SNP or SNP-X, master or slave. Master mode lets the CPU initiate communication to other PLCs, HMIs, or slave devices. You can have Port 1 as SNP master to read data from multiple slave PLCs while Port 2 acts as SNP slave for an HMI. Both ports support baud rates up to 115.2 Kbaud. The 80486DX4 handles serial communication efficiently without impacting scan time significantly.
7. Memory mapping divides between program storage (80K) and register data (240K). The register memory (%R) is massive—critical for data logging, recipe storage, large buffer areas for communication modules, and complex data structures. Optional memory modules (IC693MEMxxx) can expand register storage further if needed. Discrete I/O addressing spans 2048 points across all racks.
8. Battery-backed clock maintains year/month/day/hour/minute/second through power cycles. Lithium battery (CR2032 typical) on the CPU board powers the clock circuit. When battery dies, you lose time-of-day functionality but the CPU continues running. Replace battery every 3-4 years during scheduled maintenance. The 360’s clock is more accurate than earlier CPUs due to improved oscillator circuitry.
9. Power consumption is 1.6 A at +5 VDC—highest of all Series 90-30 CPUs. This requires careful power supply planning. IC693PWR330 (5A @ +5VDC) is recommended for most 360 applications. If running multiple high-current I/O modules, you may need PWR321 in additional racks to distribute the load. Calculate total current: CPU (1.6A) + all module currents.
10. Advanced features include analog scaling blocks, structured programming with subroutines, interrupt-driven I/O, comprehensive diagnostics, and multiple program files. The CPU supports complex data manipulation, string operations, and advanced math functions. This is the entry-level CPU for applications requiring serious programming capabilities without stepping up to Series 90-70 or PACSystems platforms.

    

    GE IC693CPU360

Field Service Pitfalls: What Rookies Get Wrong

• Field Rule: Do the math before powering up. IC693CPU360 = 1.6A @ +5VDC minimum. Add every module’s current draw. For most 360 applications, use IC693PWR330 (5A @ +5VDC) as minimum. If you’re running high-current output modules in the CPU rack, consider adding a second power supply or moving those modules to expansion racks with their own supplies. Never exceed power supply rating—a brownout corrupts NVRAM and forces full reload.

• Field Rule: Replace the clock battery every 3-4 years during scheduled outages. It’s a CR2032 lithium cell on the CPU board. Check %S0012 low battery bit—when it goes high, the battery is weak. Don’t wait until time-of-day goes haywire. The CPU continues running with a dead battery, but scheduling functions become unreliable. Swap it proactively before it causes production issues. The 360’s improved clock makes drift less noticeable, but don’t get complacent.

• Field Rule: Both serial ports on the 360 can be SNP or SNP-X, master or slave. For PLC-to-PLC communication, configure one port as master. Master mode requires COMMREQ blocks in ladder logic to initiate reads/writes to slave devices. Check programming software serial port configuration carefully. Master mode isn’t automatic—you must write logic to drive it. The 80486DX4 handles serial I/O efficiently, but you still need to write the logic.

• Field Rule: Interrupts require three things: (1) Configure the input as interrupt source in hardware setup, (2) Write the Interrupt Service Routine (ISR) as a subroutine, (3) Associate the ISR with the interrupt number. The CPU won’t magically know what to do when interrupted. Test interrupts with a signal generator before production deployment. Ensure the ISR is short and fast—the 80486DX4 handles interrupts quickly, but long ISRs still stall the main scan.

• Field Rule: Analog modules map to %R addresses. Each channel consumes register space. Calculate total analog register usage and verify it fits within 240KB. If running tight, disable unused analog channels in module configuration to free up registers. The 360 has substantial register memory, but heavy analog loads can still overrun it. For extreme analog requirements, add memory modules (IC693MEMxxx) to expand capacity.

• Field Rule: Floating-point on the 80486DX4 is fast but still not free. Benchmark your scan time after converting to float math. The 360’s scan rate (0.22 ms/K) gives you headroom, but complex floating-point operations still add overhead. Optimize critical rungs to use integer where possible—reserve floating-point for actual analog PID loops and scaling operations. Mix integer and float math strategically to keep scan time manageable.

• Field Rule: NEVER hot-swap modular CPUs. Power down the entire rack before removing or installing any CPU. Backplane voltage spikes when modules are inserted/removed under load. Hot-swapping guarantees damage—the 360 CPU board costs far more than a planned shutdown. If you need redundancy, design a hot-standby system with proper transfer hardware, not jury-rigged swaps. The 80486DX4 is particularly sensitive to backplane transients during hot insertion.

• Field Rule: Back up your program before removing any CPU from service. Download to a laptop via serial port or store on PCM/CF card. NVRAM retention is not guaranteed without power, especially if the battery is aging. Always assume a powered-down CPU will lose its program unless you’ve verified battery health recently. The 360 has substantial NVRAM, but that means more data to lose if the battery fails. A backup takes 5 minutes—losing a program takes weeks to reconstruct.

• Field Rule: The CPU needs to know what’s in each rack. In programming software, define each rack (0-7) and what modules are in each slot. The CPU uses this configuration to build I/O image tables. If configuration doesn’t match physical hardware, you get mismatch faults or I/O that doesn’t respond. Always re-verify configuration after adding or moving racks. Run configuration compare to catch mismatches. The 360 supports up to 7 racks—take advantage of this capability but configure it correctly.

• Field Rule: Use the correct GE expansion cables for your rack spacing. IC693CBL7xx series: CBL701 (2 feet), CBL702 (10 feet), CBL703 (50 feet), CBL704 (100 feet). Mismatched cables cause signal integrity issues, especially at the 360’s higher scan rates. Label your cables at both ends with length and part number. Don’t trust unmarked cables—test them with a continuity checker or replace them. Signal degradation matters more with faster processors.

• Field Rule: Subroutines improve code organization but add overhead. Each subroutine call involves a context switch. Use subroutines for reusable code blocks that are called multiple times—not once-off logic. Profile your scan time to identify which subroutines are called most frequently. Optimize frequently-called subroutines first. The 360 has plenty of horsepower, but inefficient subroutine usage still wastes it. Structure your logic hierarchically—low-level functions in subroutines, main sequence in rungs.

Commercial Availability & Pricing Note