ICS Triplex T8110B
ICS Triplex T8110B
ICS Triplex T8110B
ICS Triplex T8110B
ICS Triplex T8110B

ICS Triplex T8110B | Trusted TMR Processor Module – Field Service Notes

  • Model: T8110B
  • Alt. P/N: T8110, T8110B SerB, Trusted TMR Processor
  • Product Series: ICS Triplex Trusted 8000 Series (now Rockwell Automation)
  • Hardware Type: 6U VME-style TMR Processor Module
  • Key Feature: 100 MHz processor with triple modular redundancy, 16 MB DRAM, and triple redundant Inter-Module Bus (IMB) for SIL3 safety applications
  • Primary Field Use: Central processing unit for Trusted TMR safety instrumented systems—executing safety logic, managing I/O modules, and handling communications for emergency shutdown, fire & gas, and burner management systems.
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Description

Hard-Numbers: Technical Specifications

  • Processor Architecture: Triple Modular Redundancy (TMR) – three identical processors running in lockstep
  • Processor Clock: 100 MHz (each of three processors)
  • DRAM Memory: 16 MB EDO (60 ns access time) – triplicated
  • EPROM: 512 kB (firmware storage)
  • FLASH Memory: 2 MB (application/program storage)
  • NVRAM: 128 kB (retained variables storage)
  • Retained Variable Storage: Booleans: 1 byte each; Analogues: 4 bytes each; Timers: 5 bytes each
  • SOE Buffer Size: 1000 events onboard; expandable to 4000 events via CI (Communications Interface) buffer
  • I/O Interface: Triple redundant Inter-Module Bus (IMB) – 8-bit parallel bus to I/O modules
  • Maximum I/O Capacity: 4096 points (digital/analog mixed)
  • I/O Module Support: Up to 16 I/O modules per chassis; 60 I/O modules per remote location (with expanders)
  • Voting Architecture: 2-out-of-3 (2oo3) voting on all outputs; 1-out-of-2 (1oo2) comparison for diagnostics
  • Self-Test Interval: Every 10 ms (processor/memory/bus diagnostics)
  • Power Requirements: 20 to 32V DC; 80W maximum load; 80W heat dissipation
  • Operating Temperature: 0°C to +60°C (32°F to 140°F)
  • Storage Temperature: -25°C to +70°C (-13°F to 158°F)
  • Humidity: 10% to 95% RH non-condensing
  • Dimensions: 266 mm × 93 mm × 303 mm (H × W × D) / 30.3 cm × 9.3 cm × 26.6 cm
  • Weight: 2.94 kg (6.48 lb); 4 kg shipping weight
  • Chassis Compatibility: T8100 (primary), T8300 (expansion)
  • Hot Swap: Yes (with SmartSlot/Companion Slot configuration)
  • Certifications: TÜV SIL 3 (IEC 61508), CE, UL, CSA, ATEX

    ICS Triplex T8110B

    ICS Triplex T8110B

The Real-World Problem It Solves

Safety instrumented systems need a brain that won’t fail—ever. A single CPU failure in an ESD system can either cause a spurious trip (costing millions in lost production) or fail to trip when needed (risking catastrophic failure). The T8110B puts three independent processors in one module, running the same application in lockstep. If one processor disagrees with the other two, it’s voted out while the system continues running. The failed processor can be replaced online without stopping the safety function.
Where you’ll typically find it:
  • Central processor in offshore platform ESD systems controlling 200+ safety loops
  • Fire & gas logic solver in refineries with 1000+ detector inputs
  • Burner management controllers in power plant boilers handling flame safety and fuel valve sequencing
This module eliminates the “single point of failure” in safety system logic execution while providing 1ms event recording for incident reconstruction and online repair capability.

Hardware Architecture & Under-the-Hood Logic

The T8110B functions as the central nervous system of the Trusted TMR architecture. Unlike standard PLCs that execute on a single CPU, this module employs three processors that compare results on every instruction cycle.
Signal flow and processing logic:
  1. Triplicated Execution: Three identical 100 MHz processors execute the same IEC 61131-3 application logic simultaneously from separate memory spaces (16 MB DRAM each). Each has its own 512 KB EPROM for firmware and 2 MB Flash for application storage.
  2. Clock Synchronization: A dedicated synchronization circuit keeps all three processors locked to the same clock cycle. If one processor drifts by even a few microseconds, the voter flags it immediately.
  3. 2oo3 Voting: A hardware voter circuit compares the output of all three processors on every I/O write and internal operation. If two agree and one disagrees, the majority rules and the minority is flagged as failed. The system continues operating with two processors (2oo2) until the failed one is replaced.
  4. Inter-Module Bus (IMB): The triple-redundant IMB connects to TMR I/O modules (T8403, T8451, etc.). Each I/O module has its own triplicated channels; the T8110B communicates with all three legs independently, maintaining end-to-end TMR integrity.
  5. Self-Testing: Every 10 milliseconds, the processors run self-diagnostics—memory tests, bus integrity checks, and cross-comparisons. Diagnostic coverage exceeds 99%, meeting SIL3 requirements.
  6. SOE Recording: A dedicated hardware buffer captures 1000 events with 1ms resolution. On trigger, this expands to 4000 events via the Communications Interface (CI) module for sequence-of-events analysis during trips.
  7. Retained Variables: 128 KB NVRAM stores critical data (setpoints, counters, timer values) through power cycles. Battery-backed, but the battery is separate (in the chassis or I/O modules).

    ICS Triplex T8110B

    ICS Triplex T8110B

Field Service Pitfalls: What Rookies Get Wrong

Assuming All Three Processors Are Identical in Behavior
While the processors are hardware-identical, they can drift in timing due to temperature or age. If one processor consistently runs 1-2°C hotter, its clock may jitter slightly, causing nuisance “processor disagreement” alarms that look like hardware failures.
  • Field Rule: Check the chassis cooling fan operation before replacing a “failed” processor. A blocked air filter or failed fan causes uneven heating across the three processors. Clean the filters monthly in dusty environments. If replacing a T8110B, verify the new module has the same firmware revision (EPROM version) as the remaining two—mismatched firmware causes immediate voter lockout.
Ignoring the NVRAM Battery
The 128 KB NVRAM retains critical safety data. If the battery fails, the T8110B loses all retained variables on power-down—setpoints revert to defaults, counters reset to zero, and the safety system may not restart without re-downloading the application.
  • Quick Fix: Check the battery status via the Trusted Toolset diagnostics quarterly. The battery is typically located in the T8100 chassis or associated I/O modules—check your specific configuration. Replace every 3-5 years during scheduled maintenance, never wait for the “Battery Low” alarm. Always back up the NVRAM contents to Flash before battery replacement; if the backup fails, you can restore from the engineering workstation.
Mixing T8110 and T8110B in the Same Chassis
The T8110B is an enhanced revision of the original T8110. While functionally similar, they have different timing characteristics and EPROM requirements. Installing one of each in a redundant pair (for expansion chassis) can cause synchronization faults.
  • Field Rule: Verify the part number suffix before installing a spare. The “B” revision indicates enhanced 100 MHz processors and updated firmware. Never mix T8110 and T8110B in the same safety loop configuration—replace both processors in a redundant pair simultaneously if upgrading. Check the “SerB” or “VerO44” label on the module side.

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