Description
Product Introduction
The is the core “brain” of the Mark VIe turbine control system, occupying the Controller Carrier slot in the VME rack. It runs the QNX Real-Time Operating System (RTOS) and hosts the control application (.applfile) that manages turbine sequencing, speed/load control, and protection logic.
This “H2AE” revision utilizes a 300 MHz PowerPC processor (often MPC8245) with 128 MB SDRAM and 256 MB Flash. It is designed for Triple Modular Redundant (TMR) architectures, where three of these boards (R, S, T) run in parallel, with the UCVE performing the 2oo3 voting to ensure fault-tolerant operation. The board features front-access Dual Ethernet ports for IONet/ControlST communication and RS-232 for diagnostics .
IS215UCVEH2AE
Key Technical Specifications
- System Role: UCVE (Universal Control & Voter Electronics)
- Processor: 300 MHz PowerPC (MPC8245 or similar)
- Memory: 128 MB SDRAM (Runtime), 256 MB Flash (Storage)
- Backplane: VME64 (32-bit, Single-slot 6U)
- Networking: 2x 10/100Base-TX (RJ45, Front Access)
- Serial Ports: 1x RS-232 (Front, for BootMon/Diags)
- Voting Logic: Hardware 2oo3 (TMR) / 1oo2 (Dual) Support
- Power Req: +5 V DC (Typical 6-8 A draw)
- Indicators: OK, Active, Ethernet Link/Act LEDs
- Temp Range: -40 °C to +70 °C
- OS: QNX 4.25 (GE Custom Image)
Quality Control Process (Engineer’s Perspective)
- Incoming Verification: Match serial to manifest. Inspect the 96-pin VME fingers (P1/P2) for carbon scoring or gold creep corrosion (common in coastal plants). Check the RJ45 ports for dust or bent pins.
- Boot Test: Seat in a Mark VIe rack with 5V DC. Monitor the “OK” LED sequence. It should blink during boot, then go steady. A flashing “OK” post-boot indicates a checksum error or missing application file.
- Ethernet Loopback: Connect Port 1 to a laptop running ToolboxST. Ping the controller IP. Packet loss must be 0%; CRC errors indicate a faulty Ethernet PHY on the board.
- Thermal Check: Run a dummy control loop at 100% CPU load for 1 hr. The heatsink should be warm, not scalding (>90°C case temp is a reject). The “H2” revision usually has improved thermal pads.
- Final QC & Packaging: Clean VME fingers with isopropanol. Bag in rigid ESD foam (it’s a dense, heavy board). Label “QC Passed – Boot/Net OK” with the date.
Replacement Pitfall Guide
❗ Application Download (Critical): The stores the OS, but the Control Logic (.appl) and I/O Config (.cfg) are often loaded from the VCMI or downloaded via ToolboxST. Swapping hardware without downloading the project file results in “No Application” and the turbine will not start. Always have the .applfile ready on a USB stick or laptop.
❗ TMR Synchronization: In a TMR setup, all three (R, S, T) UCVE boards should ideally be the same revision (H2AE). Mixing an H2AE with an older H1A can cause “Vote Mismatch” or timing skew alarms during the “Align” phase of startup, forcing a trip to Simplex.
❗ Flash Corruption: If the board was pulled from a rack during a power surge, the 256MB Flash might be corrupted. If the “OK” light blinks 5-6 times repeatedly, it’s in BootMon mode—you’ll need to tftpa new OS image to recover it.
❗ VME Seating: This is a 6U single-slot board with P1/P2. “Half-seating” causes Intermittent VME Bus Errors that crash the whole rack randomly. Push firmly until the ejector levers click squarely.
❗ ESD Sensitivity: The processor and RAM are dense. Discharge to the VME chassis frame before handling—static in dry turbine halls (common in northern China winters) can kill the SDRAM invisibly.
Keep these in mind and you’ll cut 90% of rework time.
IS215UCVEH2AE
Compatibility Matrix & Benchmarks
- → GE IS200UCVEH2AE: Similar— IS200 is often the Simplex (non-TMR) version or earlier Mark VI format. IS215 is typically the Mark VIe/TMR assembly (includes faceplate). Electrically similar, but check rack slot compatibility (Carrier vs Direct VME).
- → GE IS215UCSAH2A: Different Tiers— UCSA is the Upper Controller (Higher logic/SIS interface); UCVE is the Lower Controller (Direct I/O/Voting). Do not swap them 1-for-1.
- → Mark VIe VME Rack (C/IO Core): Direct— Slides into Controller Carrier slots.
- Instruction Speed: ~0.2 µs per typical control instruction
- Boot Time: ~30-60 seconds (To “OK” steady)
- Data Throughput: 40 MB/s (VME64 Backplane)
