Description
Product Introduction
The GE is the primary I/O interface board for GE’s EX2100 excitation control systems, mounting directly onto the Exciter Regulator Backplane (ERBP). It handles the heavy lifting of signal conditioning for generator voltage, current, and firing pulses before passing data to the regulator CPU.
This “AAA” revision features enhanced conformal coating for corrosion resistance in harsh turbine environments. It utilizes two 96-pin backplane connectors (P1/P2) for high-speed data and a front-panel TEST port for diagnostics. Scan updates typically hold under 5 ms for real-time AVR loops .
IS200ERIOH1AAA
Key Technical Specifications
- System Role: ERIO (Exciter Regulator I/O)
- Form Factor: 6U VME (Double Height)
- Backplane Connectors: P1 (Slave Comms), P2 (Primary I/O Path)
- Front Ports: 2x 25-Pin D-Sub (To ECTB/EPCT Terminals), 9-Pin TEST (Diagnostics)
- Logic Voltage: 24 Vdc / 28 Vdc (From Backplane)
- Isolation: 1500 Vrms (Digital Inputs/Outputs)
- Temp Range: -30 °C to +70 °C (Operational)
- Noise Immunity: High CMRR (Differential Inputs)
- Compatibility: EX2100, EX2100e, Mark VI (ERBP Slot)
- Mounting: ERBP (Exciter Regulator Backplane) Slot
Quality Control Process (Engineer’s Perspective)
- Incoming Verification: Match the GE serial to the manifest. Inspect the 96-pin P1/P2 fingers for carbon scoring—arcing leaves permanent marks on the gold. Check the conformal coat near the D-Sub shells for flaking.
- Live Functional Test: Seat in an ERBP test rig with 24 Vdc. Initialize the regulator handshake; we monitor the TEST port signals. Scope the P2 data lines; timing skew must stay under 2 µs under load.
- Electrical Parameter Test: Back-probe the 24 Vdc rail with a Fluke 115. Megger the 25-pin field connectors to chassis at 500 V; leakage must hold >10 MΩ to survive excitation transients.
- Config Verification: Photograph the board’s hardware ID resistors (if visible). Forgetting the “AAA” coating spec in a coastal plant invites creepage faults—well, technically the software flags it, but hardware mismatch is the root cause.
- Final QC & Packaging: Clean DIN fingers with isopropanol. Bag in rigid ESD foam (6U boards are heavy). Label “QC Passed – ERBP Bus Test” with the date.
Replacement Pitfall Guide
❗ Backplane Seating: The GE uses two massive 96-pin connectors. “Half-seating” P1 while P2 is fully home bends the pins on the otherboard in the slot pair. Apply even pressure until both clips snap.
❗ Terminal Board Match: This board talks to ECTB (Contact) and EPCT (Power/CT) terminal boards via the front 25-pin ports. Plugging an ECTB cable into an EPCT port back-feeds 120 V AC into a 24 Vdc sense line—instant PCB fry.
❗ Coating Grade: The “AAA” suffix means heavy conformal coat. Swapping it for a bare “A” revision in a steam bypass cabinet leads to tracking faults on the P2 bus within 6 months due to condensation.
❗ Simplex vs Redundant: In a Triple Redundant (TMR) exciter, all three ERIO boards must be revision “AAA”. Mixing an “AAA” with an “A” causes “Hardware Mismatch” and forces the regulator to Simplex mode (losing redundancy).
❗ ESD to Backplane: The 96-pin P1/P2 are dense forests of pins. Discharge to the ERBP chassis frame before insertion—critical in dry turbine halls (common in northern China winters).
Keep these in mind and you’ll cut 90% of rework time.
IS200ERIOH1AAA
Compatibility Matrix & Benchmarks
- GE → GE IS200ERIOH1A : Needs Adaptation — AAA has coating/filter updates; verify ERBP slot acceptance in ToolboxST.
- GE → GE ERBP (Backplane) : Direct — Primary physical mate for Exciter Regulator Rack.
- GE → Standard VME I/O : Incompatible — Custom P2 pinout for Excitation Firing Pulses.
- Data Latency: < 5 ms (Field to Regulator CPU)
- Noise Rejection: > 60 dB CMRR (Typical)
- Isolation Test: 1500 Vrms (Field I/O to Logic)
